Google is Hiring Digital Design Engineer. Interested Candidates can go through the details and apply using the link provided at the bottom of the Post.
About Google
Google is an American multinational technology company that specializes in internet-related services and products. It was founded in 1998 by Larry Page and Sergey Brin while they were Ph.D. students at Stanford University. The company’s main source of revenue is through its advertising business, which uses Google’s search engine to display targeted ads to users. In addition to its search engine, Google offers a variety of other services, including email, online storage, and productivity tools. Today, Google is one of the largest and most influential companies in the world, with a significant impact on the way we access and use information.
Google Recruitment 2023
| Company name | |
| Website | www.google.com |
| Job Role | Digital Design Engineer |
| Work Location | Bangalore, India |
| Job Type | Full Time |
| Experience | Freshers/ Experienced |
| Qualification | Bachelor’s degree in Electrical Engineering, Computer Science, or equivalent practical experience. |
| Batch | Not Mentioned |
| Package | 12 – 19 LPA(Expected) |
Job Description
Google is currently seeking candidates for the position of Digital Design Engineer.
Candidate Responsibilities:
- Collaborate with the architecture team to formulate implementation strategies that meet quality, schedule, power performance, and area requirements for sub-system/chip-level integration.
- Engage with the subsystem team to plan key SOC milestones and ensure the quality of subsystem components as part of SOC milestones. Provide guidance to subsystem teams on SOC-level requirements, including IPXACT, CSR, Lint, CDC, SDC, UPF, and more.
- Work closely with a cross-functional team composed of verification, design for test, physical design, emulation, and software teams. Contribute to design decisions and provide regular project updates throughout the development process.
Candidate Requirements:
- A Bachelor’s degree in Electrical Engineering, Computer Science, or equivalent practical experience.
- Proficiency in Verilog or SystemVerilog programming languages.
- Experience in high-performance design and familiarity with multi-power domains and clocking.
- Prior experience with multiple System-on-Chip (SoC) projects that achieved silicon success.
- Domain expertise in one or more of the following areas: Process Cores, Interconnects, Debug and Trace, Security, Interrupts, Clocks/Reset, Power/Voltage Domains, PinMux.
- Understanding of cross-domain aspects, including domain validation, design for testing, physical design, and software integration.
- Competency in ASIC design methodologies, particularly for front-end quality checks such as Lint, CDC/RDC, Synthesis, design for testing, ATPG/Memory BIST, UPF, and Low Power Optimization/Estimation.
- Proficiency in chip design flow, including synthesis.
How to Apply?
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